Imagen de Portada

Computer Architecture A Quantitative Approach

  • Autor: Hennessy, Jhon L.; Patterson, David A.
  • Editorial: Morgan Kaufmann

0

Pendiente de reposición  

0 €

Actualmente no disponemos de este material en nuestro almacén. Si desea que le informemos cuando haya sido repuesto, introduzca su dirección de correo electrónico en la casilla correspondiente y pulse en el botón Me Interesa. Muchas Gracias.
Dirección de correo electronico:

Material válido paraClase de materialTipo de materialCarreraCurso
INGENIERÍA DE COMPUTADORES IIUnidad DidácticaComplementarioGRADUADO EN INGENIERÍA INFORMÁTICA2º Curso
INGENIERÍA DE COMPUTADORES IIUnidad DidácticaComplementarioGRADO EN INGENIERÍA EN TECNOLOGÍAS DE LA INFORMACIÓN2º Curso
INGENIERÍA DE COMPUTADORES IIUnidad DidácticaComplementarioMÁSTER UNIVERSITARIO EN INGENIERÍA INFORMÁTICA 

Reseña

Computer Architecture: A Quantitative Approach, Fifth Edition, explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book, which became a part of Intel's 2012 recommended reading list for developers, covers the revolution of mobile computing. It also highlights the two most important factors in architecture today: parallelism and memory hierarchy. This fully updated edition is comprised of six chapters that follow a consistent framework: explanation of the ideas in each chapter; a crosscutting issues section, which presents how the concepts covered in one chapter connect with those given in other chapters; a putting it all together section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. Formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability are included. The book also covers virtual machines, SRAM and DRAM technologies, and new material on Flash memory. Other topics include the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, vector architectures, multicore processors, and warehouse-scale computers (WSCs). There are updated case studies and completely new exercises. Additional reference appendices are available online. This book will be a valuable reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers. •Part of Intel's 2012 Recommended Reading List for Developers •Updated to cover the mobile computing revolution •Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms. •Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next") •Includes three review appendices in the printed text. Additional reference appendices are available online. •Includes updated Case Studies and completely new exercises.

Detalles

  • Nº de edición: 5
  • Año de edición: 2011
  • Número de reimpresión:
  • Año de reimpresión: 0
  • Lugar: INGLATERRA
  • Dimensiones:
  • Páginas: 856
  • Soporte: Cartoné
  • ISBN: 9780123838728

Recomendar a un amigo

Si deseas recomendar este material a un amigo, escribe tu nombre y su dirección de correo electrónico.
Tu nombre: Su e-mail:


Logotipo de la Universidad Nacional de Educación a Distancia

© Fundación Ramón J. Sender 2000-2017. Registrado en España
Centro de la UNED Barbastro [Contacto]

Logotipo de la Fundación Ramón J. Sender

Icono de alerta Las cookies nos permiten ofrecer nuestros servicios. Al navegar por LibrosUNED.com, consideramos que acepta el uso que hacemos de ellas.
Puede cambiar la configuración de cookies en cualquier momento. Para más información, puede consultar nuestro documento de politica de cookies

Cerrar